TY  - JOUR

T1  - Error analysis and error modelling of a hardware-in-the-loop simulation system

JO  - Computer Simulation

PY  - 2002/03/01

AU  - Wei H

AU  - Meng X

AU  - Liu ZZ

AU  - Wang Z

ED  - 

VL  - 19

IS  - 2

SP  - 7

EP  - 9

Y2  - 2024/12/25

ER  -